A typical example of a semiconductor device having a silicide layer on the upper portion of the gate electrode is disclosed for example in JP 2005-286155 A. The disclosed device has a silicide layer composed of materials such as tungsten silicide (WSi) provided on the upper portion of the memory transistor gate electrode. The provision of the silicide layer reduces the resistivity of the control gate electrode composed of materials such as polycrystalline silicon film.
Narrower interconnect width owning to recent device densification calls for further reduction in resistivity. Alternative silicide material to address lower resistivity are metal material such as titanium (Ti), nickel (Ni), and cobalt (Co).
These alternative materials, unlike tungsten, have low melting point. Thus, considering their sensitivity to thermal processing, they need to undergo silicide treatment later in the process flow instead of being formed as titanium silicide (TiSi2) nickel silicide (NiSi) and cobalt silicide (CoSi2) films in one go. Hence, titanium film, nickel film, or the cobalt film is formed and thermally processed to form a self aligning silicide after fabricating the gate electrode configuration.
In siliciding titanium film, nickel film or cobalt film formed over the polycrystalline silicon film, the exposed surface of the polycrystalline silicon film is cleaned by DHF (Dilute HF) to promote reaction between the metal film and the polycrystalline film.
However, the wet process by DHF, for example, introduces the following problems, for instance, when the thickness of the silicide layer is increased. In a NAND flash memory, the breakdown voltage relative to the ONO (oxide nitride oxide) film serving as an inter-gate insulating film in the context of interconnect function is reduced, whereas in case of a logical element, increase in junction leak is observed.